Patent #	Title	Date
7362084	Fast Voltage Regulators For Charge Pumps	04/22/08
7358559	Bi-Directional Read/Program Non-Volatile Floating Gate Memory Array, And Method of Formation	04/15/08
7356317	Adaptive-Biased Mixer	04/08/08
7351613	Method of Trimming Semiconductor Elements With Electrical Resistance Feedback	04/01/08
7342840	Single Transistor Sensing and Double Transistor Sensing For Flash Memory	03/11/08
7336516	Unified Multilevel Cell Memory	02/26/08
7326614	Self Aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby	02/05/08
7325177	Test circuit and method for multilevel cell flash memory	01/29/08
7315056	Semiconductor memory array of floating gate memory cells with program/erase and select gates	01/01/08
7307308	Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation	12/11/07
7276971	Multi-Operational Amplifier System	10/02/07
7263005	Method Of Programming A Non-Volatile Memory Cell By Controlling The Channel Current During The Rise Period	08/28/07
7254379	RF Receiver Mismatch Calibration System and Method	08/07/07
7249213	A Memory Device Operable With A Plurality of Protocols With Configuration Data Stored In Non-Volatile Storage Elements	07/24/07
7248625	Multi-Operational Amplifier System	07/24/07
7247907	BiDirectional Split Gate Nand Flash Memory Structure and Array, Method of Programming, Erasing and Reading Thereof, And Method of Manufacturing	07/24/07
7245529	Dynamically Tunable Resistor Or Capacitor Using A Non-Volatile Floating Gate Memory Cell	07/17/07
7242051	Split Gate NAND Flash Memory Structure and Array, Method Of Programming, Erasing and Reading Thereof, and Method Of Manufacturing	07/10/07
7242050	Stacked Gate Memory Cell With Erase To Gate, Array, And Method of Manufacturing	07/10/07
7227217	Non-Volatile Memory Cell Having Floating Gate, Control Gate and Separate Erase Gate, An Array of Such Memory Cells and Method of Manufacturing	06/05/07
7221763	High Throughput AES Architecture	05/22/07
7217621	The process of fabricating the self-aligned, split-gate NAND flash memory	05/15/07
7215573	Method and Apparatus for Reducing Operation Disturbance	05/08/07
7212459 B2	Unified Multilevel Cell Memory	05/01/07
7208376	Self-Aligned Method Of Forming A Seminconductor Memory Array Of Floating Gate Memory Cells With Buried Floating Gate And Pointed Channel Region	04/24/07
7205198	Method Of Making A Bi-Directional Read/Program Non-Volatile Floating Gate Memory Cell	04/17/07
7190018	BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY CELL WITH INDEPENDENT CONTROLLABLE CONTROL GATES, AND ARRAY THEREOF, AND METHOD OF FORMATION	03/23/07
7183163	Method Of Manufacturing An Isolation-Less Array Of Bi-Directional Read/Program Non-Volatile Floating Gate Memory Cells With Independent Controllable Control Gates	02/27/07
7161844	Method and Apparatus for Compensating for Bitline Leakage Current	01/09/07
7,280,805	Lo-Leakage and Sideband Image Calibration System and Method	10/09/07
7,277,682	RF Passive Mixer With DC Offset Tracking and Local Oscillator DC bias Level-Shifting Network For Reducing Even-Order Distortion	10/02/07
7,239,550	Method Of Programming A Non-Volatile Memory Cell	07/03/07
7,238,959	Phase Change Memory Device Employing Thermally Insulating Voids And Sloped Trench, And A Method Of Making Same	07/03/07
7,236,054	Multi-Operational Amplifier System	06/26/07
7,196,927	Wide Dynamic Range and High Speed Volage Mode Sensing for A Multilevel Digital Non Volatile Memory	03/27/07
7,196,921	High-Speed and Low-Power Differential Non-Volatile Content Addressable Memory Cell and Array	03/27/07
7,190,018	Bi-Directional Read/Program Non-Volatile Floating Gate Memory Cell with Independent Controllable Control Gates, and Array Thereof and Method of Formation	03/13/07
7,184,345	High Speed and High Precision sensing for Digital Multilevel NVM System	02/27/07
7,180,127	Semiconductor Memory Array of Floating Gate Memory Cells with Buried Floating Gate, Pointed Floating Gate and Pointed Channel Region	02/20/07
7,158,431	Single Transistor Sensing and Double Transistor Sensing for Flash Memory	01/02/07
7,155,357	Method and Apparatus for Detecting an Unused State in a Semiconductor Circuit	12/26/06
7,151,021	Bi-Directional Read/Program Non Volatile Floating Gate Memory Cell and Array Thereof and Method of Formation	12/19/06
7,149,110	Seek Window Verify Program System and Method for a Multilevel Non Volatile Memroy Integrated Circuit System	12/12/06
7,146,442	Motherboard Having a NonVolatile Memory Which is Reprogrammable	12/05/06
7,144,778	Self Aligned Method of Forming a Semiconductor Memory Array of Floating Gate Cells with Buried Bit Line and Raised Source Line	12/05/06
7,139,196	Sub-Volt Sensing for Digital Multilevel Memory	11/21/06
7,132,873	Method and Apparatus for Avoiding Gated Diode Breakdown in Transistor Circuits	11/07/06
7,129,536	Non-Planar Non-Volatile Memory Cell with an Erase Gate, an Array Therefor and a Method of Making Same	10/31/06
7,119,396	NROM Device	10/10/06
7,102,930	Method of Programming a NonVolatile Memory Cell to Eliminate or to Minimize Program Deceleration	09/05/06
7,084,453	Method of Forming Different Oxide Thickness for High Voltage Transistor and Memory Cell Tunnerl Dielectric	08/01/06
7,074,672	Self Aligned Method of Forming a Semiconductor Memory Array of Floating Gate Memory Cells with Buried Bit Line and Vertical Word Line Transistor	07/11/06
7,071,763	Transistor Circuits for Switching High Voltages and Currents Without Causing Snapback or Breakdown	07/04/06
7,069,371	Motherboard Having a NonVolatile Memory Which is Reprogrammable Through a Video Display Port and a NVM Switchable Between Two Communication Protocols	06/27/06
7,061,295	High Voltage Generation and Regulation System for Digital Multilevel Non Volatile Memory	06/13/06
7,058,754	Non Volatile Memory Device Capable of Simultaneous Erase and Program of Different Blocks	06/06/06
7,050,316	Differential Non Volatile Content Addressable Memory Cell and Array Using Phase Changing Resistor Storage Elements	05/23/06
7,046,552	Flash Memory with Enhanced Program and Erase Coupling and Process of Fabricating the Same	05/16/06
7,038,960	High Speed and High Precision Sensing for Digital Multilevel NonVolatile Memory System	05/02/06
7,038,538	Folded Cascode High Voltage Operational Amplifier with Class AB Source Follower Output Stage	05/02/06
7,037,787	Flash Memory with Trench Select Gate and Fabrication Process	05/02/06
7,035,151	Array Architecture and Operating Methods for Digital Multilevel NonVolatile Memory Integrated Circuit System	04/25/06
7,032,064	Single Chip Embedded Microcontroller Having Multiple NV Erasable PROMS Sharing a Single High Voltage Generator	04/18/06
7,031,214	Digital Multilevel Non-Volatile Memory System Having Multistage Autozero Sensing	04/18/06
7,027,348	Power Efficient Read Circuit for a Serial Output Memory Deivce and Method	04/11/06
7,019,998	Unified Multilevel Cell Memory	03/28/06
7,018,897	Self Aligned Method of Forming a Semiconductor Memory Array of Floating Gate Memory Cells with Control Gate Spacers	03/28/06
7,015,537	Isolation-less, Contact-less Array of NonVolatile Memory Cells Each Having a Floating Gate for Storage of Charges and Methods of Manufacturing, and Operating Therefor	03/21/05
7,012,472	Digital Control Loop To Improve Phase Noise Performance…	03/14/06
7,012,310	Array of Multi-Bit ROM Cells with Each Cell Having Bi-Directional Read and a Method for Making the Array	03/14/06
7,012,273	Nano-scale Insulated Chalcogenide Electronics (NICE) RAM as Low Power, High Speed Memory, Using Negative Spacer	03/14/06
7,009,886	Bit Line Pre-Charge Based on Partial Address for Serial Memory Sensing	03/07/06
7,008,846	A Non-Volatile Floating Gate Memory Cell with Floating Gates Formed as Spacers, and an Array Thereof, and a Method of Manufacturing	03/07/06
6,992,937	Column Redundancy For Digital ML NVM	01/31/06
6,992,934	Real Bitline Inhibit Method and Apparatus for Voltage Mode Sensing	01/31/06
6,992,929	Self-Aligned Split-Gate NAND Flash Memory and Fabrication Process	01/31/06
6,992,909	A Multi-Bit ROM Cell For Storing One of N>4 Possible States and Having Bi-Directional Read, An Array of Such Cells and a Method for Making the Array	01/31/06
6,988,231	On-Chip Method and Apparatus for Testing Semiconductor Curcuits	01/17/06
6,975,539	Digital Multilevel Non-Volatile Memory System	12/13/05
6,972,994	Method of Screening Wordline Defect	12/06/05
6,970,386	Method and Apparatus…	11/29/05
6,969,687	Method of Planarizing Wafer Topology Using CMP	12/05/05
6,967,524	High Voltage Generation and Regulation System for Digital Multilevel NonVolatile Memory	11/22/05
6,967,372	Method to form Vertical Word...	11/22/05
6,960,803	A Landing Pad for Use as a Contact to a Conductive Spacer	11/01/05
6,958,273	Self Aligned Twin Tips and Method of Making	10/25/05
6,952,034	Common Source for Buried FG	10/04/05
6,952,033	Raised Source Trench Cell	10/04/05
6,950,336	Method and Apparatus for Emulating an Electrically Erasable Programmable Read Only Memory (EEPROM) Using Non-Volatile Floating Gate Memory Cells	09/27/05
6,944,064	Memory Unit Having Programmable Device ID	09/13/05
6,943,617	Low Voltage CMOS Bandgap Reference	09/13/05
6,940,125	Vertical NROM and Methods for Making Thereof	09/06/05
6,937,507	Memory Device and Method of Operating Same	08/30/05
6,936,883	Bi-Directional Read/Program Non Volatile Floating Gate Memory Cell and Array Thereof and Method of Formation	08/30/05
6,927,993	A Multi-Bit ROM Cell For Storing One of N>4 Possible States and Having Bi-Directional Read, An Array of Such Cells	08/09/05
6,927,410	Memory Device with Discrete Layers of Phase Change Memory Material	08/09/05
6,917,069	Semiconductor Memory Array of Floating Gate Memory Cells with Buried Bit-Line and Vertical Word Line Transistor	07/12/05
6,913,975	Non Volatile Floating Gate Memory Cell with Floating Gates Formed in Cavities, and Array Thereof, and Method of Formation	07/05/05
6,906,379	Semiconductor Memory Array of Floating Gate Memory Cells with Buried Floating Gate	06/14/05
6,894,339	Flash Memory with Trench Select Gate and Fabrication Process	05/17/05
6,891,220	Method of Programming Electrons onto A Floating Gate of Non Volatile Memory Cells	05/10/05
6,885,600	Differential Sense Amplifier for Multilevel Non-Volatile Memory	04/26/05
6,885,586	Self Aligned Split-Gate NAND Flash Memory and fabrication Process	04/26/05
6,883,075	Microcontroller Having an Embedded Non-Volatile Memory Array with Read Protection	04/19/05
6,882,572	Method of Operating A Semiconductor Memory Array of Floating Gate Memory Cells with Horizontally Oriented Edges	04/19/05
6,878,591	Self Aligned Method of Forming Non Volatile Memory Cells with Flat Word Line	04/12/05
6,874,069	Microcontroller Having an Embedded Non-Volatile Memory Array with Read Protection for the Array and Portions Thereof	03/29/05
6,873,006	Semiconductor Memory Array of Floating Gate Memory Cells with Buried Floating Gate and Pointed Channel Region	03/29/05
6,870,233	Multi-Bit ROM Cell with Bi-Directional Read and A Method of Making Thereof	03/22/05
6,868,015	Semiconductor Memory Array of Floating Gate Memory Cells with Control Gate Spacer Portions	03/15/05
6,867,638	High Voltage Generation and Regulation System for Digital Multilevel NonVolatile Memory	03/15/05
6,865,099	Wide Dynamic Range and High Speed Volage Mode Sensing for A Multilevel Digital Non Volatile Memory	03/08/05
6,861,698	Array of Floating Gate Memory Cells Having Strap Regions and A Peripheral Logic Device Region	03/01/05
6,861,315	Method of Manufacturing an Array of Bi-Directional Non Volatile Memory Cells	03/01/05
6,855,980	Semiconductor Memory Array of Floating Gate Memory Cells with Buried Low Resistance Source Regions and High Source Coupling	02/15/05
6,853,584	Circuit for Compensating Programming Current Required, Depending upon Programming State	02/08/05
6,847,808	Ultra High Linearity Passive Mixer	01/25/05
6,841,982	A Curved Fractional CMOS Bandgap Reference	01/11/05
6,839,277	Serial ID on MPF	01/04/05
6,834,009	SuperFlash Cell with FG as Gate of Transistor connected to Gate of Pass Transistor in a PLD Device	12/21/04
6,822,287	Interleave Connection of Source Lines to Prevent Punch Through	11/23/04
6,815,704	Self Aligned Air-Gap Thermal Insulation for Nano-scale Insultaed Chalcogenide Electronics (NICE) RAM	11/09/04
6,813,194	Bias Distrbution Network for MLC Flash Array	11/02/04
6,809,425	Integrated Circuit with Reprogrammable Non Volatile Switch Having a Dynamic Threshold Voltage for Selectively Connecting A Source for A Signal to A Circuit	10/26/04
6,807,610	Method and Apparatus for Virtually Partitioning an Integrated Multilevel Nonvolatile Memory Circuit	10/19/04
6,806,531	A Non-Volatile Floating Gate Memory Cell with Floating Gates Formed in Cavities, and an Array Thereof, and a Method of Forming	10/19/04
6,788,608	High Voltage Pulse Method and Appareatus for Digital Mutilevel NV Memory	09/07/04
6,788,595	Embedded Algorithm for Non-Volatile Recall	09/07/04
6,777,260	Nano-scale Insulated Chalcogenide Electronics (NICE) RAM as Low Power, High Speed Memory, Using Double Spacer Definition	08/17/04
6,773,989	Self Aligned Method of Forming a Semiconductor Memory Array of Floating Gate Memory Cells with Control Gate Protruding Portions	08/10/04
6,773,974	Method of Forming a Semiconductor Array of Floating Gate Memory Cells and Strap Regions	08/10/04
6,756,633	Semiconductor Memory Array of Floating Gate Memory Cells with Horizontally Oriented Floating Gate Edges	06/29/04
6,756,632	Integrated Circuit with Reprogrammable Non Volatile Switch for Selectively Connecting a Source for a Signal to a Circuit	06/29/04
6,756,284	Method of Forming a Sublithographic Opening in a Semiconductor Process	06/29/04
6,754,103	A Multi-level Flash Programming Method to Reduce Programming Time	06/22/04
6,751,118	Array Architecture & Operating Methods for Digital Multilevel Non-Volatile Memory Intergrated Circuit System	06/15/04
6,750,090	Self Aligned Method of Forming a Semiconductor Memory Array of Floating Gate Memory Cells with Floating Gates Having Multiple Sharp Edges, and Memory Array Made Thereby	06/15/04
6,747,310	Flash Memory Cell with Seperated Self-Aligned Select and Erase Gates and Process of Fabrication	06/08/04
6,743,674	Method of Forming a Semiconductor Array of Floating Gate Memory Cells and Strap Regions and a Memory Array and Strap Regions Made Thereby	06/01/04
6,735,139	SRAM Function on DRAM Array	05/11/04
6,727,545	A super Self-aligned Flash EEPROM cell	04/27/04
6,706,592	Self Aligned Superflash Memory	03/16/04
6,703,318	Method of CMP Planarizing Wafer Topology with Large Diffusion Areas and Inter Metal Dielectric Layers	03/09/04
6,699,772	Hybrid Trench Isolation Technology for High Voltage Isolation Using Thin Field Oxide in a Semiconductor Process	03/02/04
6,691,055	Integrated Circuit Provided with Means for Calibrating an Electronic Module and Method for Calibrating an Eletronic Module or an Integrated Circuit	02/10/04
6,670,845	High DC Voltage to Low DC Voltage Circuit Converter	12/30/03
6,639,842	Method and Apparatus for Programming NV Memory Cells	10/28/03
6,639,818	Differential NV Content Addressable Memory Cell and Array	10/28/03
6,639,428	Method and System for Synamically Clocking Digital Systems Based on Power Usage	10/28/03
6,627,946	An Ultra Self Aligned Flash EEPROM Cell with SAC	09/30/03
6,627,942	A Method for Forming a Self-Aligned Floating...	09/30/03
6,617,935	An Improved Oscillator	09/09/03
6,608,361	Monolithic Implementation of Extremely High-Q (>500) Transformer-type Active Inductors on CMOS and its Apparatus	08/19/03
6,593,177	Self Aligned Method of Forming a Semiconductor Memory Array of FLoating Gate Memory Cells and a Memory Made Thereby	04/15/03
6,591,327	Flash Memory with Alterable Erase Sector Size	07/08/03
6,590,825	Non-Volatile Flash Element	07/08/03
6,590,453	A Folded Cascode High Voltage Operational Amplifier with Class AB Source Follower Output Stage	07/08/03
6,590,253	Memory Cell with Self Aligned Floating Gate and Seperate Select Gate, and Fabrication Process	07/08/03
6,580,642	Novel Erase Mechinism Stack Gate Cell with Poly to Poly Program	06/17/03
6,566,919	Power on Circuti for Generating Reset Signal	05/20/03
6,566,706	Semiconductor Array of Floating Gate Memory CElls and Strap Regions	05/20/03
6,563,167	A Semiconductor Memory Array of Floating Gate Memory Cells with Floating Gate Having Multiple Sharp Edges	05/13/03
6,560,730	Method and Apparatus for Testing a NVM Array Having a Low Number of Output Pins	05/06/03
6,548,995	High Speed Bias Circuit	04/15/03
6,541,324	A Method of Forming a Semiconductor Array of Floating Gate Memory Cells Having Strap Regions and a Peripheral Logic Device Region	04/01/03
6,529,409	Integrated Circuit for Concurrent Flash Memory with Uneven Array Architechture	03/04/03
6,525,371	Self Aligned Non-Volatile Random Access Memory Vell and Process to Make the Same	02/25/03
6,519,180	Array Architecture & Operating Methods for Digital Multilevel Non-Volatile Memory Intergrated Circuit System	02/11/03
6,510,081	Electronically Erasable Programmable Read-Only Memory Having Reduced-Page-Size Program and Erase	01/21/03
6,505,279	Microcontroller System Having Security Circuitry to Selectivly Lock Portions of a Program	01/07/03
6,504,754	Array Architecture & Operating Methods for Digital Multilevel Non-Volatile Memory Intergrated Circuit System	01/07/03
6,503,785	Flash Memory Cell with Contactless Bit Line, and Process of Fabrication	01/07/03
6,490,212	Bitline Precharge Matching	12/03/02
6,487,116	Precision Programming of Non-Volatile Memory Cells	11/26/02
6,477,103	Reprogrammable Fuse & Method of Operating	06/19/02
6,466,488	Reduction of Data Dependent Power Supply Noise When Sensing the State of a Memory Cell	10/15/02
6,462,986	Intergrated Curcuit for Storage Retrieval of Multipule Digital Bits per Non-Volatile Memory Cells	10/08/02
6,456,539	Method and Apparatus for Sensing a Memory Signal From a Selected Memory Cell of a Memory Device	09/24/02
6,455,942	Method and Apparatus for Strapping a Plurality of Polysilicon Lines in a Semiconductor Integrated Circuit Device	09/24/02
6,429,075	A Method of Self Aligning a Floating Gate to a Control Gate and to an Isolation in an Electrically Erasable and Programming Memory Cell and a Cell Made Thereby	08/06/02
6,427,186	Memory, Interface System and Method for Mapping Logical Block Numbers in a Flash Memory Having an Erase Block Size Larger than a Write Block Size, Using a Master Index Table and a Table of Physical Sector Numbers	07/30/02
6,426,896	Flash Memory Cell with Contactless Bit Line, and Process of Fabrication	07/30/02
6,421,213	Method and Apparatus for Detecting a Tamper Condition and Isolating a Circuit Therefrom	07/16/02
6,414,522	Bias Generating Circuit for Use with an Oscillating Circuit in an Integrated Circuit Charge Pump	07/02/02
6,405,323	Defect Management for Interface to Electrically-Erasable Programmable Read-Only Memory	06/11/02
6,400,603	Electronically Erasable Programmable Read-Only Memory Having Reduced-Page-Size Program and Erase	06/04/02
6,396,743	Control Circuit for a Non-Volatile Memory Array for Controlling the Ramp Rate of High Voltage Applied to the Memory Cells and to Limit the Current Drawn Therefrom	05/28/02
6,396,742	Testing of Multilevel Semiconductor Memory	05/28/02
6,381,181	Timing Independent Current Comparison and Self Ltching Data Circuit	04/30/02
6,369,420	A Method of Self Aligning a Floating Gate to a Control Gate and to an Isolation in an Electrically Erasable and Programming Memory Cell and a Cell Made Thereby	04/09/02
6,339,815	Microcontroller System Having Allocation Circuitry to Selectively Allocate and/or Hide Portions of a Program Memory Address Space	01/15/02
6,329,685	Self Aligned Method of Forming a Semiconductor Memory Array of Floating Gate Memory Cells and a Memory Made Thereby	12/11/01
6,313,498	Flash Memory Cell with Thin Floating Gate with Rounded Side Wall and Fabrication Process	11/06/01
6,292,874	Memory Management Method and Aparatus for Partitioning Homogeneous Memory and Restricting Access of Installed Applications to Predetermined Memory Ranges	09/18/01
6,292,391	Isolation Circuit and Method for Controlling Discharge of High-Voltage in a Flash EEPROM	09/18/01
6,291,297	Flash Memory Cell with Self Aligned gates and Fabrication Process	09/18/01
6,285,598	Precision Programming of Non-Volatile Memory Cells	09/04/01
6,282,145	Array Architecture & Operating Methods for Digital Multilevel Non-Volatile Memory Integrated Circuit System	08/28/01
6,268,762	An Improved Output Stage for a Charge Pump and a Charge Pump Made Thereby	07/31/01
6,246,634	Integrated Memory Circuit Having a Flash Memory Array and at Least One SRAM Memory Array with Internal Address and Data Bus for Transfer of Signals Therebetween	06/12/01
6,242,972	Clamp Circuit Using PMOS-Transistors with a Weak Temperature Dependency	06/05/01
6,229,290	A Voltage Regulating Circuit with Clamp Up Circuit and a Clamp Down Circuit Operating in Tandem	05/08/01
6,223,144	Method and Apparatus for Evaluating Software Programs for Semiconductor Circuits	04/24/01
6,222,765	A Non-Volatile Flip-Flop Circuit	04/24/01
6,222,227	Memory Cell with Self Aligned Floating Gate and Seperate Select Gate, and Fabrication Process	04/24/01
6,219,291	Reduction of Data Dependent Power Supply Noise When Sensing the State of a Memory Cell	04/17/01
6,191,642	Charge Pump Circuitry	03/20/01
6,184,668	Voltage Sensing Circuit and Method for Preventing a Low-Voltage From Being Inadvertently Sensed as a High-Voltage During Power-Up or Power-Down	02/06/01
6,184,554	Memory Cell with Self Aligned Floating Gate and Seperate Select Gate, and Fabrication Process	02/06/01
6,180,420	Low Temperature CVD Processes for Preparing Ferroelectric Filims Using BI Carboxylates	01/30/01
6,173,419	Field Programmable Gate Array (FPGA) Emulator for Debugging Software	01/09/01
6,166,574	Circuit for Turning On and Off a Clock Without a Glitch	12/26/00
6,157,979	Programmable Controlling Device with Non Volatile Ferroelectric State Machines for Restarting Processor When Power is Restored with Execution States Retained in Said Non Volatile State Machines on Power Down	12/05/00
6,145,020	Microcontroller Incorporating an Enhanced Peripheral Controller for Automatic Updating the Configuration Data of Mulitple Peripherals By Using a Ferroelectric Memory Array	11/07/00
6,141,251	A Non-Volatile Memory Array Having an Index Used in Programming and Erasing	10/31/00
6,140,182	Non Volatile Memory with Self-Aligned Floating Gate and Fabrication Process	10/31/00
6,108,236	Smart Card Comprising Integrated Circuitry Including EPROM and Error Check and Correction System	08/22/00
6,097,636	Word Line and Line Driver Circuitries	08/01/00
6,091,104	Flash Memory Cell with Self Aligned Gates and Fabrication Process	07/18/00
6,038,174	Precision Programming of Non-Volatile Memory Cells	03/14/00
5,982,665	Non-Volatile Memory Array Having a Plurality of Non-Volatile Memory Status Cells Coupled to a Status Circuit	11/09/99
5,910,914	A Sensing Circuit for a Floating Gate Memory Device Having Multiple Levels of Storage in a Cell	06/08/99
5,905,673	Integrated Circuit for Storage and Retrieval of multiple Digital Bits Per Non-Volatile Memory Cell	05/18/99
5,901,089	Stabilization Circuits and Techniques for Storage and Retrieval of Single or Multiple Digital Bits per Memory Cell	05/04/99
5,870,335	Precision Programming of Non-Volatile Memory Cells	02/09/99
5,852,577	An Electrically Erasable and Programmable Read-Only Memory Having a Small Unit for Program and Erase	12/22/98
5,815,439	Stabilization Circuits and Techniques for Storage and Retrieval of Single or Multiple Digital Bits per Memory Cell	09/29/98
5,687,114	Integrated Circuit for Storage and Retrieval of multiple Digital Bits Per Non-Volatile Memory Cell	11/11/97
5,572,054	A Method of Operating a Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device	11/05/96
5,500,826	Solid State Peripheral Storage Device	03/19/96
5,479,609	A Solid State Peripheral Storage Device Having Redundant Mapping Memory Algorithm	12/26/95
5,475,634	A Floating Gate Memory Array with Latches Having Improved Immunity to Write Disturbance and with Storage Latches	12/12/95
5,432,748	Solid State Peripheral Storage Device	07/11/95
5,386,158	Sensing Circuit for a Floating Gate Memory Device	01/31/95
5,373,467	A Solid State Memory Device Capable of Providing Data Signals on 2N Data Lines or N Data Lines	12/13/94
5,369,609	A Floating Gate Memory Array with Latches Having Improved Immunity to Write Disturbance and with Storage Latches	11/29/94
5,359,570	Solid State Peripheral Storage Device	10/25/94
5,289,411	Floating Gate Memory Array Device Having Improved Immunity to Write Disturbance	02/22/94
5,278,087	Method of Making a Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device with a Re-Crystallized Floating Gate	01/11/94
5,242,848	A Self-Aligned Method of Making a Split Gate Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device	09/07/93
5,226,006	Write Protection Circuit for use with an Electrically Alterable Non-Volatile Memory Card	07/06/93
5,202,850	Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device with a Re-Crystallized Floating Gate	04/13/93
5,191,232	A High Frequency Voltage Multiplier for an Electrically Erasable and Programmable Memory Device	03/02/93
5,181,187	Low Power Voltage Sensing Circuit	01/19/93
5,067,108	Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device with a Re-Crystallized Floating Gate	05/19/99
5,045,488	Method of Manufacturing a Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device	09/03/91
5,029,130	Single Transistor Non-Volatile Electrically Alterable Semiconductor Memory Device	07/02/91